mREDAC

The mREDAC is the module-holder level assembly that combines the cluster-local computation blocks, the routing structure, the control interface, and dedicated front I/O connections into one configurable analog computing unit. It is not a single computation block. It is the carrier structure in which multiple blocks are installed and interconnected so that pybrid can configure an analog computation across routing, weighting, summation, sampling, mathematical operation, and control stages.

An mREDAC contains:

• 3 clusters.
• 1 T-Block for module-level routing.
• 1 Ctrl-Block for control, configuration, measurement, and coordination functions.
• A frontplane interface for external/module-level MCX, AUX, and system connections.

Each cluster contains:

• 1 U-Block.
• 1 C-Block.
• 1 I-Block.
• 1 SH-Block.
• 2 M-Block positions.